Investigating and Mitigating Contention on Low-End Multi-Core Microcontrollers

Abstract

In this paper, we investigate the problem of contention and loss of predictability in modern microcontrollers (MCU). To address this issue, we first present a framework to empirically analyze and ob- serve the impact of interference on low-end MCUs. With carefully crafted evaluation scenarios, we conduct experiments on an Arm’s Musca-A1 platform and provide sufficient evidence that even with common application setups, interference can slowdown applica- tions by several orders of magnitude. Furthermore, we propose an architecture for a novel mitigation system that enables applications to monitor their timing progress slackness and mitigate temporal interference over shared resources. This is achieved by suspend- ing less critical cores and reconfiguring their priority on the bus when intolerable contention delays are present. Our findings em- phasize the critical importance of considering the impact of shared resources, such as interconnects and memory access patterns, on low-end multi-core MCUs. It is, therefore, crucial to design mecha- nisms that can allow MCU-based applications to regain control of their timeliness

Weifan Chen

Ph.D in Computer Science

My research interests include cyber physical system and artificial intelligence.